1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more specifically, it relates to a method of fabricating a semiconductor device including a low dielectric constant insulator film.
2. Description of the Background Art
The importance of a copper wiring technique has recently been increased following requirement for a high-speed semiconductor integrate circuit. In this regard, there is proposed a dual damascene structure obtained by combining a copper wire and a low dielectric constant interlayer dielectric film with each other. The dual damascene structure is generally constructed by forming a wiring trench and a contact hole (via hole) in an insulator film by etching, filling up the wiring trench and the contact hole with a metal and thereafter removing an excess depositional portion by polishing thereby forming a buried wire.
FIGS. 21 to 23 are sectional views for illustrating a conventional process of fabricating a semiconductor device including a dual damascene structure. The conventional process of fabricating a semiconductor device including a dual damascene structure is now described with reference to FIGS. 21 to 23.
First, a first low dielectric constant interlayer dielectric film 102 consisting of an organic polymer is formed on a metal cap barrier film 101, as shown in FIG. 21. An etching stopper film 103 consisting of SiO2 or Si3N4 having an opening 103a is formed on a prescribed region of the first low dielectric constant interlayer dielectric film 102. A second low dielectric constant interlayer dielectric film 104 consisting of an organic polymer is formed to cover the etching stopper film 103. Thereafter a hard mask 105 consisting of an SiO2 or Si3N4 film having an opening 105a is formed on the second low dielectric constant interlayer dielectric film 104.
As shown in FIG. 22, the hard mask 105 and the etching stopper film 103 are employed as masks for plasma-etching the second and first low dielectric constant interlayer dielectric films 104 and 102, thereby simultaneously forming a wiring trench 107 and a via hole (contact hole) 106.
As shown in FIG. 23, the via hole 106 and the wiring trench 107 are filled up with copper and an excess depositional portion is removed by polishing, thereby forming a buried wire 108 consisting of copper. Thus, the conventional semiconductor device including a dual damascene structure is formed.
In the aforementioned conventional method of fabricating a semiconductor device including a dual damascene structure, however, the etching stopper film 103 must be prepared from a material having a high etching selectivity with respect to the first and second low dielectric constant interlayer dielectric films 102 and 104 in the plasma etching step shown in FIG. 22. In general, therefore, the etching stopper film 103 is formed by an SiO2 film (dielectric constant: 3.9 to 4.5) or an Si3N4 film (dielectric constant: 6 to 9) having a relatively high dielectric constant. In order to prevent the via hole 106 from deforming in this case, the thickness of the etching stopper film 103 consisting of SiO2 or the like must be increased. In the final dual damascene structure shown in FIG. 23, therefore, the effective dielectric constant of the overall insulator film including the first low dielectric constant interlayer dielectric film 102, the etching stopper film 103 and the second low dielectric constant interlayer dielectric film 102 is disadvantageously increased.
An object of the present invention is to provide a method of fabricating a semiconductor device capable of increasing the etching selectivity of a low dielectric constant insulator film without increasing the thickness of the etching mask layer to an etching mask layer such as an etching stopper film.
Another object of the present invention is to suppress increase of the effective dielectric constant of the overall insulator film including the etching mask layer and the low dielectric constant insulator film in the aforementioned method of fabricating a semiconductor device.
In order to attain the aforementioned objects, a method of fabricating a semiconductor device according to a first aspect of the present invention comprises steps of forming a first insulator film including a polymer film containing C and H, forming a first etching mask layer containing Si on a prescribed region of the first insulator film, and plasma-etching the first insulator film through a mask of the first etching mask layer with plasmas of etching gases containing a nitrogen atom and monochromated ions energy having a narrow energy width.
When plasma-etching the first insulator film with the etching gas containing a nitrogen atom and the ions having a narrow energy width through the mask of the first etching mask layer containing an Si atom (silicon atom) thereby adjusting the range of the monochromatic ion energy in the method of fabricating a semiconductor device according to the first aspect, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be easily increased. Thus, the thickness of the first etching mask layer consisting of a material having a relatively high dielectric constant may not be increased, whereby the overall insulator film including the first insulator film and the first etching mask layer can be inhibited from increase of the effective dielectric constant.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the etching gas including either ammonia gas or mixed gas of nitrogen gas and hydrogen gas and the monochromated ion energy of at least 200 eV and not more than 600 eV. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be increased to at least about 5.
In this case, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the etching gas including either ammonia gas or mixed gas of nitrogen gas and hydrogen gas and the monochromatic ion energy of at least 400 eV and not more than 600 eV. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be increased to at least about 5 and the etching rate can be increased.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the etching gas including nitrogen gas and the monochromatic ion energy of at least 200 eV and not more than 400 eV. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be increased to at least about 5.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the first etching mask layer is preferably a film containing an Si atom. When the first etching mask layer contains an Si atom, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be increased by employing the aforementioned etching conditions. In this case, the first etching mask layer preferably includes at least one film selected from a group of an Si3N4 film, an SiO2 film and an SiOCH film.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the first etching mask layer preferably includes an Si3N4 film, and the plasma etching step preferably includes a step of plasma-etching the first insulator film with the etching gas including ammonia gas and the monochromatic ion energy having a narrow energy width through a mask of the first etching mask layer including the Si3N4 film. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be further increased.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the first insulator film is preferably a low dielectric constant insulator film having a dielectric constant of less than 3.9. When the low dielectric constant insulator film is employed as the first insulator film, inter-wire capacitance can be reduced.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the monochromatic ion energy, defined as e(Vp+Vbias) when employing a plasma etching apparatus applying a DC bias voltage Vbias to a plasma source, assuming that Vp represents a plasma potential. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be easily increased by adjusting the range of the monochromatic ion energy e(Vp+Vbias) when employing the plasma etching apparatus applying the DC bias voltage Vbias to the plasma source.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the monochromatic ion energy prepared from high energy peak ion energy defined as e(Vp+2Vrf) when employing a plasma etching apparatus applying a high-frequency bias voltage Vrfxc2x7sin(2xcfx80ft), to a substrate, assuming that Vp represents a plasma potential. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be easily increased by adjusting the monochromatic ion energy e(Vp+2Vrf) when employing the plasma etching apparatus applying the high-frequency bias voltage Vrfxc2x7sin(2xcfx80ft) to the substrate.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the monochromated ion energy e(Vp+|Vdc|) when employing a plasma etching apparatus applying a high-frequency bias voltage Vrfxc2x7sin(2xc2x7f1t) having a high frequency f1 of at least 10 MHz to a substrate, assuming that Vp represents a plasma potential and Vdc represents a voltage depending on electric charges stored in the substrate. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be easily increased by adjusting the range of the monochromated ion energy e(Vp+|Vdc|) when employing the plasma etching apparatus applying the high-frequency bias voltage Vrfxc2x7sin(2xcfx80f1t) having the high frequency f1 of at least 10 MHz to the substrate.
In the aforementioned method of fabricating a semiconductor device according to the first aspect, the plasma etching step preferably includes a step of plasma-etching the first insulator film with the monochromatic ion energy e(Vp+|VPL|) when employing a plasma etching apparatus applying a pulse bias voltage VPL to the substrate, assuming that Vp represents a plasma potential. According to this structure, the etching selectivity of the first insulator film such as a low dielectric constant insulator film to the first etching mask layer can be easily increased by adjusting the monochromatic ion energy e(Vp+|VPL|) when employing the plasma etching apparatus applying the pulse bias voltage VPL to the substrate.
The aforementioned method of fabricating a semiconductor device according to the first aspect preferably further comprises steps of forming a second insulator film including a polymer film containing a carbon atom and a hydrogen atom on the first etching mask layer and forming a second etching mask layer on a prescribed region of the second insulator film in advance of the plasma etching step, while the plasma etching step preferably includes a step of plasma-etching the second insulator film and the first insulator film with the etching gas containing a nitrogen atom and the monochromatic ion energy having a narrow energy width through masks of the second etching mask layer and the first etching mask layer thereby simultaneously forming a via hole and a wiring trench. According to this structure, the etching selectivity of the first and second insulator films such as low dielectric constant insulator films to the first etching mask layer can be increased, whereby the thickness of the first etching mask layer consisting of a material having a relatively high dielectric constant may not be increased. Thus, the overall insulator film including the first insulator film, the first etching mask layer and the second insulator film can be inhibited from increase of the effective dielectric constant. Consequently, a dual damascene structure consisting of a low dielectric constant insulator film having a via hole (contact hole) and a wiring trench can be formed.
In this case, the second insulator film is preferably a low dielectric constant insulator film having a dielectric constant of less than 3.9. When the low dielectric constant insulator film is employed as the second insulator film, inter-wire capacitance can be reduced.
A method of fabricating a semiconductor device according to a second aspect of the present invention comprises steps of forming a first insulator film including a polymer film containing a carbon atom and a hydrogen atom, forming a first etching mask layer containing an Si atom on a prescribed region of the first insulator film, forming a second insulator film including a polymer film containing C and H on the first etching mask layer, forming a second etching mask layer on a prescribed region of the second insulator film and simultaneously forming a via hole and a wiring trench by plasma-etching the second insulator film and the first insulator film with etching gas containing nitrogen and monochromated ion energy having a narrow energy width through masks of the second etching mask layer and the first etching mask layer.
When plasma-etching the second insulator film and the first insulator film with the etching gas containing a nitrogen atom and the monochromated ion energy having a narrow energy width through the masks of the second etching mask layer and the first etching mask layer containing Si thereby adjusting the monochromated ion energy in the method of fabricating a semiconductor device according to the second aspect, the etching selectivity of the first and second insulator films such as low dielectric constant insulator films and the first etching mask layer can be easily increased. Thus, the thickness of the first etching mask layer consisting of a material having a relatively high dielectric constant may not be increased, whereby the overall insulator film including the first insulator film, the first etching mask layer and the second insulator film can be inhibited from increase of the effective dielectric constant. Consequently, a dual damascene structure consisting of a low dielectric constant insulator film having a via hole (contact hole) and a wiring trench can be formed.
In the aforementioned method of fabricating a semiconductor device according to the second aspect, the step of simultaneously forming the via hole and the wiring trench preferably includes a step of plasma-etching the second insulator film and the first insulator film with the etching gas including either ammonia gas or mixed gas of nitrogen gas and hydrogen gas and the monochromatic ion energy of at least 200 eV and not more than 600 eV. According to this structure, the etching selectivity of the first and second insulator films consisting of low dielectric constant insulator films or the like to the first etching mask layer can be increased to at least about 5.
In this case, the step of simultaneously forming the via hole and the wiring trench preferably includes a step of plasma-etching the second insulator film and the first insulator film with the etching gas including either ammonia gas or mixed gas of nitrogen gas and hydrogen gas and the monochromatic ion energy of at least 400 eV and not more than 600 eV. According to this structure, the selectivity of the first and second insulator films consisting of low dielectric constant insulator films or the like to the first etching mask layer can be increased to at least about 5, while the etching rate can be increased.
In the aforementioned method of fabricating a semiconductor device according to the second aspect, the step of simultaneously forming the via hole and the wiring trench preferably includes a step of plasma-etching the second insulator film and the first insulator film with the etching gas including nitrogen gas and the monochromatic ion energy of at least 200 eV and not more than 400 eV. According to this structure, the selectivity of the first and second insulator films consisting of low dielectric constant insulator films or the like to the first etching mask layer can be increased to at least about 5.
In the aforementioned method of fabricating a semiconductor device according to the second aspect, the first etching mask layer is preferably a film containing Si. When the first etching mask layer is formed by such a film, the etching selectivity of the first and second insulator films such as low dielectric constant insulator films to the first etching mask layer can be increased by employing the aforementioned etching conditions.
In the aforementioned method of fabricating a semiconductor device according to the second aspect, the first etching mask layer preferably includes an Si3N4 film, and the step of simultaneously forming the via hole and the wiring trench preferably includes a step of plasma-etching the second insulator film and the first insulator film with the etching gas including ammonia gas and the monochromatic ion energy having a narrow energy width through masks of the second etching mask layer and the first etching mask layer including the Si3N4 film. According to this structure, the etching selectivity of the first and second insulator films such as low dielectric constant insulator films to the first etching mask layer can be further increased.
In the aforementioned method of fabricating a semiconductor device according to the second aspect, the first insulator film and the second insulator film are preferably low dielectric constant insulator films having dielectric constants of less than 3.9. When the low dielectric constant insulator films are employed as the first and second insulator films, inter-wire capacitance can be reduced.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.